Topic: xilinx Goto Github
Some thing interesting about xilinx
Some thing interesting about xilinx
xilinx,CNN accelerator implemented with Spinal HDL
Organization: 19801201
xilinx,A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
User: bperez77
xilinx,Plugins for Yosys developed as part of the F4PGA project.
Organization: chipsalliance
Home Page: https://f4pga.org
xilinx,PCI Express DIY hacking toolkit for Xilinx SP605. This repository is also home of Hyper-V Backdoor and Boot Backdoor, check readme for links and info
User: cr4sh
xilinx,A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
User: definelicht
xilinx,Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
User: eugene-tarassov
xilinx,Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
Organization: f4pga
Home Page: https://prjuray.rtfd.io
xilinx,100 Gbps TCP/IP stack for Vitis shells
Organization: fpgasystems
Home Page: https://systems.ethz.ch/fpga
xilinx,Tools for running FPGA vendor toolchains with Docker
User: halfmanhalftaco
xilinx,MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn't define TrustZone-like primitives to provide hardware separation. To shield critical functionality from untrusted third-party components, MultiZone provides hardware-enforced, software-defined separation of multi
Organization: hex-five
Home Page: https://hex-five.com/multizone-security-tee-riscv/
xilinx,Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
User: hukenovs
xilinx,Simple, zero-copy DMA to/from userspace.
User: jeremytrimble
xilinx,Vivado and PetaLinux projects for Zynq EBAZ4205 Board
User: keitetsuworks
xilinx,Recipe for FPGA cooking
User: lastweek
xilinx,帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目
User: leiwang1999
xilinx,:satellite: Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz
User: meowlucian
xilinx,:satellite: Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz
User: meowlucian
xilinx,Verilog Implementation of an ARM LEGv8 CPU
User: nxbyte
xilinx,This repository contains source code for past labs and projects involving FPGA and Verilog based designs
User: nxbyte
xilinx,Notes on the Red Pitaya Open Source Instrument
User: pavel-demin
Home Page: http://pavel-demin.github.io/red-pitaya-notes/
xilinx,Repurposing existing HDL tools to help writing better code
User: suoto
xilinx,Universal utility for programming FPGA
User: trabucayre
Home Page: https://trabucayre.github.io/openFPGALoader/
xilinx,NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
Organization: trivialmips
xilinx,MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
Organization: trivialmips
xilinx,[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
Organization: ucla-vast
Home Page: https://tapa.rtfd.io
xilinx,32-bit Superscalar RISC-V CPU
User: ultraembedded
xilinx,IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Organization: vlsi-eda
Home Page: https://tu-dresden.de/ing/informatik/ti/vlsi
xilinx,Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
User: wangxuan95
Home Page: https://gitee.com/wangxuan95/Xilinx-FPGA-PCIe-XDMA-Tutorial
xilinx,Brevitas: neural network quantization in PyTorch
Organization: xilinx
Home Page: https://xilinx.github.io/brevitas/
xilinx,HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
Organization: xilinx
xilinx,Build Customized FPGA Implementations for Vivado
Organization: xilinx
Home Page: http://www.rapidwright.io
xilinx,Vitis_Accel_Examples
Organization: xilinx
Home Page: http://xilinx.github.io/Vitis_Accel_Examples/
xilinx,VNx: Vitis Network Examples
Organization: xilinx
xilinx,HLS-based Graph Processing Framework on FPGAs
Organization: xtra-computing
xilinx,Bus bridges and other odds and ends
User: zipcpu
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