Topic: hdl Goto Github
Some thing interesting about hdl
Some thing interesting about hdl
hdl,Revengineered ancient PDP-11 CPUs, originals and clones
User: 1801bm1
hdl,DDR2 memory controller written in Verilog
User: adibis
hdl,A modern hardware definition language and toolchain based on Python
Organization: amaranth-lang
Home Page: https://amaranth-lang.org/docs/amaranth/
hdl,HDL libraries and projects
Organization: analogdevicesinc
Home Page: https://wiki.analog.com/resources/fpga/docs/hdl
hdl,M2k firmware for the ADALM-2000 Active Learning Module
Organization: analogdevicesinc
hdl,PlutoSDR Firmware
Organization: analogdevicesinc
hdl,ACT hardware description language and core tools.
Organization: asyncvlsi
Home Page: http://avlsi.csl.yale.edu/act
hdl,DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
User: brianhginc
hdl,A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
User: catkira
hdl,Test suite designed to check compliance with the SystemVerilog standard.
Organization: chipsalliance
Home Page: https://chipsalliance.github.io/sv-tests-results/
hdl,Web-based HDL diagramming tool
User: davidthings
Home Page: https://davidthings.github.io/hdelk/
hdl,DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
Organization: dfianthdl
Home Page: https://dfianthdl.github.io/
hdl,A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
User: dpretet
hdl,Hardware Description Languages
User: drom
hdl,FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Organization: f4pga
Home Page: https://f4pga.org
hdl,Custom chips reverse-engineered from silicon
User: furrtek
hdl,Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools
Organization: gateware-ts
Home Page: https://gateware-ts.github.io/gateware-ts
hdl,PCB Design Language: A programming way to design schematics.
Organization: google
hdl,Support files for participating in a Fomu workshop
Organization: im-tomu
Home Page: https://workshop.fomu.im
hdl,The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language.
Organization: intel
Home Page: https://intel.github.io/rohd-website
hdl,Kactus2 is a graphical EDA tool based on the IP-XACT standard.
Organization: kactus2
Home Page: https://research.tuni.fi/system-on-chip/tools/
hdl,HDL symbol generator
User: kevinpt
Home Page: https://kevinpt.github.io/symbolator
hdl,VeloView performs real-time visualization and easy processing of live captured 3D LiDAR data from Velodyne sensors (Alpha Prime™, Puck™, Ultra Puck™, Puck Hi-Res™, Alpha Puck™, Puck LITE™, HDL-32, HDL-64E). Runs on Windows, Linux and MacOS. This repository is a mirror of https://gitlab.kitware.com/LidarView/VeloView-Velodyne.
Organization: kitware
Home Page: http://www.paraview.org/VeloView/
hdl,🧩 Monibuca is a Modularized, Extensible framework for building Streaming Server
User: langhuihui
Home Page: https://m7s.live
hdl,Functional Coverage and Constrained Randomization Extensions for Cocotb
User: mciepluc
hdl,A web-based IDE for https://nand2tetris.org
Organization: nand2tetris
Home Page: https://nand2tetris.github.io/web-ide
hdl,A new Hardware Design Language that keeps you in the driver's seat
Organization: pc2
hdl,Sol-1: A CPU/Computer System made from 74 series logic.
User: pconst167
Home Page: http://sol-1.org
hdl,Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework
Organization: pymtl
hdl,HTML & Js based VCD viewer
User: raczben
Home Page: http://raczben.pythonanywhere.com/
hdl,Reviewing some online CS courses I took
User: spamegg1
hdl,Repurposing existing HDL tools to help writing better code
User: suoto
hdl,Sphinx Extension which generates various types of diagrams from Verilog code.
Organization: symbiflow
Home Page: https://sphinxcontrib-hdl-diagrams.rtfd.io
hdl,Open source machine learning accelerators
Organization: tensil-ai
Home Page: https://www.tensil.ai
hdl,An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.
User: trcwm
Home Page: http://www.moseleyinstruments.com
hdl,This is a repository containing solutions to the problem statements given in HDL Bits website.
User: viduraakalanka
hdl,一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
User: wangxuan95
Home Page: https://gitee.com/wangxuan95/BSV_Tutorial_cn
hdl,HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded functions, with ZERO learning-curve
User: wilsonchen003
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.