Topic: xilinx-fpga Goto Github

👇 Here are 205 public repositories matching this topic...

anydsl / anyhls
xilinx-fpga,High-Level Synthesis with Partial Evaluation
Organization: anydsl
high-level-synthesis hls intel-fpga xilinx-fpga

chamanagrawal / cs220
xilinx-fpga,This repository contains lab assignments done in the course CS220: Computer Organization at IIT Kanpur
User: chamanagrawal
verilog computer-organization xilinx-fpga

charkster / spi_slave_verilog
xilinx-fpga,SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
User: charkster
xilinx-fpga spi digilent

chipsalliance / yosys-f4pga-plugins
xilinx-fpga,Plugins for Yosys developed as part of the F4PGA project.
Organization: chipsalliance
Home Page: https://f4pga.org
yosys yosys-plugin eda fpga xilinx xilinx-fpga toolchain f4pga

derekmulcahy / xvcpi
xilinx-fpga,Xilinx Virtual Cable Server for Raspberry Pi
User: derekmulcahy
jtag zynq snickerdoodle xilinx-vivado xilinx-fpga

diogofferreira / fpga-miner
xilinx-fpga, :moneybag: A simplified version of an FPGA bitcoin miner :moneybag:
User: diogofferreira
fpga bitcoin-miner xilinx-fpga vivado

dylanvanassche / digitale-synthese
xilinx-fpga,DSSS Wireless transmit-receive system in VHDL
User: dylanvanassche
modelsim vhdl dsss digital-systems kuleuven transmitter receiver fpga xilinx xilinx-fpga

emrealci / fpga-verilog
xilinx-fpga,Practices related to the fundamental level of the programming language Verilog.
User: emrealci
comparator fpga frequency-divider hardware-designs hdl latch multiplexer sr-latch verilog verilog-components

f4pga / f4pga-arch-defs
xilinx-fpga,FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Organization: f4pga
Home Page: https://f4pga.org
fpga ice40 sphinx documentation verilog hdl xilinx-fpga artix kintex7 architecture-definitions

f4pga / prjuray
xilinx-fpga,Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
Organization: f4pga
Home Page: https://prjuray.rtfd.io
fpga xilinx xilinx-fpga ultrascale ultrascale-plus bitstream fuzzer vivado symbiflow

f4pga / prjxray
xilinx-fpga,Documenting the Xilinx 7-series bit-stream format.
Organization: f4pga
Home Page: https://f4pga.github.io/prjxray-db/
fpga xilinx xilinx-fpga artix artix7 kintex7 bitstream tools toolchain fuzzer

f4pga / prjxray-db
xilinx-fpga,Project X-Ray Database: XC7 Series
Organization: f4pga
Home Page: https://f4pga.github.io/prjxray-db/
fpga xilinx xilinx-fpga artix artix7 kintex7 bitset tools toolchain database

fpgasystems / coyote
xilinx-fpga,Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.
Organization: fpgasystems
amd fpga gpu hbm rdma service tcp virtualization xilinx-fpga

fredrequin / verilator_xilinx
xilinx-fpga,Re-coded Xilinx primitives for Verilator use
User: fredrequin
fpga verilator verilog xilinx-fpga

geraked / verilog-rle
xilinx-fpga,Verilog Implementation of Run Length Encoding for RGB Image Compression
User: geraked
verilog fpga ise rle rle-compression-algorithm compression-algorithm verilog-hdl verilog-code image-compression matlab

hex-five / multizone-iot-sdk
xilinx-fpga,MultiZone® Trusted Firmware is the quick and safe way to build secure IoT applications with any RISC-V processor. It provides secure access to commercial and private IoT clouds, real-time monitoring, secure boot, and remote firmware updates. The built-in Trusted Execution Environment provides hardware-enforced separation ...
Organization: hex-five
Home Page: https://hex-five.com/multizone-trusted-firmware-riscv/
iot firmware mqtt tls tcp-ip tee trusted-execution-environment trustzone multizone lwip

ilyajob05 / verilog_modules
xilinx-fpga,verilog modules
User: ilyajob05
verilog rmii i2c spi uart usart timer memory 7-segment synchronization

imjustadog / ae-pcie-dma-axi
xilinx-fpga,way to use xapp1052 with new version of PCIe IP core（AXI bus）
User: imjustadog
xilinx-fpga xilinx-axi pcie

ingonyama-zk / blaze
xilinx-fpga,blaze is a Rust library for ZK acceleration on Xilinx FPGAs.
Organization: ingonyama-zk
aws fpga hardware zero-knowledge xilinx-fpga

ingonyama-zk / open-binius
xilinx-fpga,building blocks for accelerating ZK proofs over binary fields
Organization: ingonyama-zk
cryptography fpga hardware xilinx-fpga zero-knowledge

karenok / sap-1-computer
xilinx-fpga,Design and Implementation of a Simple-As-Possible 1 (SAP-1) Computer using an FPGA and VHDL.
User: karenok
Home Page: https://karenok.github.io/SAP-1-Computer/
vhdl fpga vivado xilinx-fpga

kuoyaoming93 / sem-ip_pynq
xilinx-fpga,SEM (Soft Error Mitigation) IP adapted for PYNQ-Z2
User: kuoyaoming93
soft-error xilinx xilinx-vivado xilinx-fpga zynq pynq pynq-hardware-overlay pynq-z1 pynq-z2 python

mattuna15 / merlin
xilinx-fpga,Learn how to create your own 32-bit system from scratch.
User: mattuna15
Home Page: https://hackaday.io/project/180536-merlin
68000 68k 68k-assembly gcc-cross-compiler hardware fpga xilinx-fpga vivado arty digilent

mcagriaksoy / vhdl-fpga-lab_projects
xilinx-fpga,My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)
User: mcagriaksoy
Home Page: http://eem.eskisehir.edu.tr/Ders.aspx?dersId=85
xilinx-fpga xilinx-ise fpga vhdl vhdl-code vhdl-examples fpga-soc verilog

mcedrdiego / kria_yolov3_ppe
xilinx-fpga,Xilinx Kria KV260 Real-time PPE detection
User: mcedrdiego
yolov3 fpga xilinx-fpga real-time kria-som kv260

multimedia-processing / digital-logic-design
xilinx-fpga,透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。
Organization: multimedia-processing
Home Page: https://gitlab.com/Multimedia-Processing/Digital-Logic-Design
vhdl learn fpga altera-cyclone-v-sockit altera-cyclone-iii-de0 verilog hdl soc-kit altera-cyclone systemverilog

neeraj1397 / performance-analysis-of-parallel-prefix-adders-using-zynq-7000-apsoc
xilinx-fpga,Performed a comparative study of Parallel Prefix Adders using Verilog HDL on Zynq-7000 APSoC (PL) from XIlinx. Circuits are simulated, synthesized and implemented using Vivado Design Suite.
User: neeraj1397
prefix-adder adder prefix-tree kogge-stone-adder brent-kung han-carlson ladner-fischer verilog vivado xilinx-fpga

olivier-le-sage / camera-filters
xilinx-fpga,Colorspace conversion, gamma correction, and more -- all integrated within a MIPI-to-HDMI pipeline in FPGA.
User: olivier-le-sage
sea-s7 fpga verilog mipi hdmi yuv2rgb rgb2yuv gamma-correction piecewise-linear-approximation spartan7

open-sdr / openwifi
xilinx-fpga,open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
Organization: open-sdr
fpga ofdm 802-11 zynq linux xilinx analog-devices mac80211 csma dma

petrsocha / hls-crypto
xilinx-fpga,FPGA Cryptography for High-Level Synthesis
User: petrsocha
cryptography encryption fpga fpga-soc high-level-synthesis digital-design digital side-channel side-channel-attacks side-channel-safe

pontazaricardo / verilog_calculator_matrix_multiplication
xilinx-fpga,This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
User: pontazaricardo
verilog vhdl calculator matrix-multiplication xilinx xilinx-ise xilinx-vivado xilinx-fpga low-level-programming hardware-designs

sailordiary / computer-systems-ucas
xilinx-fpga,**科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session
User: sailordiary
verilog cpu xilinx-vivado xilinx-fpga computer-systems

salvatorebarone / cnn-vhdl
xilinx-fpga,A library of VHDL components for Neural Networks
User: salvatorebarone
artificial-intelligence artificial-neural-networks convolutional-neural-networks lenet-5 vhdl ghdl xilinx-fpga virtex approximation approximate-computing

santifs / ultrasonic-sensor
xilinx-fpga,Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.
User: santifs
vhdl nexys4ddr fpga-programming xilinx-fpga vhdl-modules vhdl-code ultrasonic-sensor parking-sensor 7segment

sarthak268 / embedded_logic_and_design
xilinx-fpga,This repository contains all labs done as a part of the Embedded Logic and Design course.
User: sarthak268
arm c embedded-c embedded-logic embedded-systems logic-circuit logic-programming pmod verilog verilog-hdl verilog-programs verilog-project vhdl vhdl-code vivado xilinx xilinx-fpga xilinx-sdk xilinx-vivado zedboard

simoneruffini / norm
xilinx-fpga,Framework for emulation of non volatile memory using off-the-shelf FPGAs
User: simoneruffini
vhdl fpga xilinx-fpga xilinx-vivado non-volatile-memory feram openhardware

siorpaes / simplesoc
xilinx-fpga,Very simple Cortex-M1 SoC design based on ARM DesignStart
User: siorpaes
arm cortex-m cortex-m1 designstart digitaldesign fpga fpga-soc hardware-designs mcu soc systemonchip verilog xilinx-fpga xilinx-vivado

splacharya / digitaloscilloscope_zynq7000soc
xilinx-fpga,A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample data is displayed using a Graphical User Interface which mimics an Oscilloscope.
User: splacharya
zedboard digital-oscilloscope xilinx-fpga xilinx-vivado zynq-7000 fpga-soc verilog-hdl embedded-systems

stevenbell / csirx
xilinx-fpga,Open-source CSI-2 receiver for Xilinx UltraScale parts
User: stevenbell
csi2 mipi-camera ultrascale xilinx-fpga

theshadowx / keyboard-ip
xilinx-fpga,PS/2 Keyboard IP written in VHDL for Xilinx FPGA
User: theshadowx
vhdl xilinx keyboard-ip xilinx-fpga demo

thraetaona / innervator
xilinx-fpga,Innervator: Hardware Acceleration for Neural Networks
User: thraetaona
Home Page: https://doi.org/10.36227/techrxiv.172263165.56660174/v1
artifical-neural-network artificial-intelligence fpga freestanding machine-learning neural-networks neuron standalone vhdl vhdl-2008

trisycl / sycl
xilinx-fpga,SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Organization: trisycl
accelerators clang cpp20 dpc-toolchain llvm oneapi-dpc sycl sycl-compilation trisycl xilinx-fpga xilinx-vitis

ultraembedded / core_dvi_framebuffer
xilinx-fpga,Minimal DVI / HDMI Framebuffer
User: ultraembedded
hdmi dvi verilog fpga xilinx-fpga video framebuffer axi4

ultraembedded / core_ft60x_axi
xilinx-fpga,FTDI FT600 SuperSpeed USB3.0 to AXI bus master
User: ultraembedded
ftdi-devices ft600 axi4 bus-master verilog fpga xilinx-fpga data-acquisition usb3

ultraembedded / openlogicbit
xilinx-fpga,Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
User: ultraembedded
fpga logic-analyzer xilinx-fpga lattice-fpga altera-fpga ftdi232h ftdi2232h digital-signal-analyzer verilog

viktorslavkovic / fpga_tetris
xilinx-fpga,FPGA Tetris written in Verilog
User: viktorslavkovic
fpga spartan6 tetris-game verilog xilinx xilinx-fpga xilinx-ise

wissance / 2dimageprocessing
xilinx-fpga,2d Images processing system with FPGA (Zynq 7k) from two dragster linescanner (DR-2k-7)
Organization: wissance
dr-2k-7 2d image-processing frequency-analysis optical-measurements dragster awaiba cmosis 2d-scaner frequency-measurment optics optical optical-system optical-sensors fpga verilog optical-mark-recognition xilinx-fpga xilinx-vivado computer-vision

wissance / imagecapturesystem
xilinx-fpga,A Xilinx IP Core and App for line scanner image capture and store
Organization: wissance
dragster linescanners image video capture-the-flag cmosis awaiba two-channel-image-capture-system axi-vdma axi-quad-spi

wissance / quickspi
xilinx-fpga,Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
Organization: wissance
spi-hdl spi axi spi-ip-core spi-pld spi-fpga spi-interface verilog-spi axi-interfaces bit-oriented-spi

yourigh / rotary-encoder-vhdl-design
xilinx-fpga,VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.
User: yourigh
rotary encoder axi vivado xilinx-vivado xilinx-fpga zybo zynq zynq-7010