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ed_lib

Implementations of edge (ED, EDColor, EDPF), line (EDLines), circle and low eccentric ellipse (EDCircles) detection algorithms.

edge_extraction

Fast and robust algorithm to extract edges in unorganized point clouds

edgegraph3d

Multi-view Stereo 3D Edge Reconstruction

edgetpu

Coral issue tracker (and legacy Edge TPU API source)

edgetx

EdgeTX is the cutting edge open source firmware for your R/C radio

edk2

EDK II

edl-max2769-l5

IRNSS Receiver Front-end

edl_final_fpga_project

edm-fde

Euclidean distance matrix-based GNSS fault detection and exclusion

edpl-rfmslam

RFM-SLAM: Relative Feature Measurements-based Simultaneous Localization and Mapping

edrico

EDRICO (Educational DHBW RISC-V Core) is a small 32-bit RISC-V core implementing the Integer base architecture and Zicsr extension. It is developed as part of a students project at the DHBW Ravensburg by Noah Wölki and Levi Bohnacker under supervision by Prof. Dr.-Ing. Ralf Gessler.

eds-buildconf

Build bootstrapping for the Event-aided Direct Sparce Odometry (EDS)

edu-filpped_tensor_core

Tensor Core Basic Implmentation

educationphysicalexaminationplatform

基于STM32 RK3399的智能体检试验台

edugnss

Satellite Geodesy, GNSS, orbits

edvr

Winning Solution in NTIRE19 Challenges on Video Restoration and Enhancement (CVPR19 Workshops) - Video Restoration with Enhanced Deformable Convolutional Networks. EDVR has been merged into BasicSR and this repo is a mirror of BasicSR.

edxbuildingariscvcpucore

edX LinuxFoundationX LFD111x Building a RISC-V CPU Core

ee-fpga-board

A catchall repo for my more EE-related projects

ee175

EE 175 Senior Design. Multibaseline Stereo Camera

ee272_cgra

ee272 cgra vectorized PE project

ee272b_cgra

A 4x8 CGRA (Coarse Grained Reconfigurable Array) used to accelerate applications written in Halide

ee674flight_dynamics-master

eece5698-gnss-kalman

eecs568_final

InEKF Localization and Semantic Mapping on the KITTI Dataset

eecs568_problemsets

Assignment code base for EECS568: Mobile Robotics

eecs570p2

Murphi code of MESI w/ Self-degradation & support for arbitrary network reordering.

eee5716_intro_to_hardware_securityring-oscillator-puf-design-and-optimization-for-fpga

In this paper, a series of Ring Oscillators has been wired in different ways to form Ring Oscillator PUFs to find out the RO PUF which has a better quality. Thus, three different routing methods are proposed and developed , software automatic routing design, 1D and 2D hard-macro array design. And the quality factors including uniqueness, reliability and uniformity are analyzed

eees-array

Energy-efficient embedded systems

eekf

C-Implementation of an Extended Kalman Filter for use in embedded applications

ef2m45-soc

Anlogic EF2M45 SOC bsp and project